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INTERLITH - Technical Details

Technical in depth dive of INTERLITH's capabilities

What Does the INTERLITH Process Look Like?

INTERLITH is a fully wet spin on processed material, in where all the actions are performed in an atmospheric environment.

 

In the same way you would process a traditional photoresist, only with INTERLITH there is no development step and the final result is a film with conductive traces where the light has exposed the film.

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Process: Coat UV exposure (mask defined) → bake to set the glass and seal the metal.
Function: Arbitrary conductive routing inside one monolithic glass sheet, no further development or plating required.

 

Specification Guidance

  • Feature sizes: down to 20 microns with contact masks; coarser on projection tools.

  • Layering: sequential coat/expose/bake cycles enable multi-layer routing and simple buried vias.

  • Thermal budgets:

    • Low-temperature set: ≤ 250 °C (3H silica matrix).

    • High-temperature glass densification: available within the same material.

  • Adhesion & durability: metal is sealed inside the glass film; dark regions remain insulating.

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Design & Integration Notes

  • Masks: Standard chromium-on-glass or film masks; hard contact improves edge acuity.

  • Stacks: Compatible with glass/FR-4 carriers; can be laminated, bonded, or integrated as a utilities layer in interposer stacks.

  • Open pads / landings: Keep windows minimal; most routing should remain buried for maximum robustness.

  • Current & length: Best for short to moderate runs, sensing, and utility paths. For long, high-current distribution or ultra-low loss, pair with copper technologies.

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Handling, Storage & Safety

  • Storage: INTERLITH is a light sensitive compound, store it cool and away from ambient light.

  • Handling: INTERLITH contains flammable solvents, store according to local safety regulations.

  • Disposal: INTERLITH contains silver metal salts, dispose according to local waste disposal regulations.

Empowering The Next Generation of Microfabrication​

©2025 by Engistaff Semiconductor

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